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Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices1–3, integrating millions of qubits in a single processor will require device fabrication to reach a scale comparable to that of the modern complementary metal–oxide–semiconductor (CMOS) industry. Equally important, the scale of cryogenic device testing must keep pace to enable efficient device screening and to improve statistical metrics such as qubit yield and voltage variation. Spin qubits1,4,5 based on electrons in Si have shown impressive control fidelities6–9 but have historically been challenged by yield and process variation10–12. Here we present a testing process using a cryogenic 300-mm wafer prober13 to collect high-volume data on the performance of hundreds of industry-manufactured spin qubit devices at 1.6 K. This testing method provides fast feedback to enable optimization of the CMOS-com

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