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USB-C 3.1 SS/SSP PHY, Type-C in TSMC (16nm, 12nm, 7nm)

Synopsys' DesignWare USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the leading process . ....

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USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm

The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use . ....

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USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm

The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use . ....

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USB 3.2 Gen2x2 with PIPE 4.3 and USB2.0 with UTMI+ interface

M SQUARE USB 3.2 PHY IP is designed based on the USB 3.2 Gen2x2 specification from the USB Implementer Forum. It provides bandwidth up to 20Gbps. This . ....

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USB3.2 PHY IP on Samsung 4LPE

The DesignWare® SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes . ....

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