The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use .
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use .
The USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use with host, embedded host, On-the-Go (OTG) and function controllers.
USB 2.0 High-Speed Function Controller The USB 2.0 PHY IP is a high-speed USB 2.0 transceiver for use with host, embedded host, On-The-Go (OTG), and function controllers. Compliant with the UTMI+ level 3 (USB 2.0 Transceiver Macrocell Interface Plus) specification, the USB 2.0 PHY integrates high-speed, mixed-signal circuits to support High-Speed traffic at 480Mbps and is backward compatible to Full-Speed (12Mbps) and Low-Speed (1.5Mbps) data rates.
This transceiver is optimized for low power consumption, minimal die area (sub-1mm2), and high-data throughput. The MUSBHPHY comprises a complete on-chip physical transceiver solution with Electro Static Discharge (ESD) protection, full support for OTG and host functionality, and includes an optional charge pump to provide a 5V power supply to external USB peripherals.