Press release originally posted by SEMI
Sep 5, 2023
Dr. Pileggi Will be Recognized for His Significant Contributions to the Electronic System Design Industry
MILPITAS, Calif. –– September 5, 2023 –– Dr. Lawrence Pileggi, Coraluppi Head and Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University, will be honored with the 2023 Phil Kaufman Award for distinguished contributions to Electronic System Design (ESD). The award will be presented at the annual Phil Kaufman Award presentation and dinner in…
AI Adoption Slow For Design Tools Kapoor, A., Lin, R., & Green, W. M. . Power, complexity, and scaling of photonic integrated circuits. Applied Physics Reviews, 6, 031307. .
The metal–oxide–semiconductor field-effect transistor (MOSFET), a core element of complementary metal–oxide–semiconductor (CMOS) technology, represents one of the most momentous inventions since the industrial revolution. Driven by the requirements for higher speed, energy efficiency and integration density of integrated-circuit products, in the past six decades the physical gate length of MOSFETs has been scaled to sub-20 nanometres. However, the downscaling of transistors while keeping the power consumption low is increasingly challenging, even for the state-of-the-art fin field-effect transistors. Here we present a comprehensive assessment of the existing and future CMOS technologies, and discuss the challenges and opportunities for the design of FETs with sub-10-nanometre gate length based on a hierarchical framework established for FET scaling. We focus our evaluation on identifying the most promising sub-10-nanometre-gate-length MOSFETs based on the
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