The MXL-LVDS-DPHY-CSI2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY .
Automotive MIPI A-PHY Source IP - 1-Lane The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking applications in ADAS and autonomous drive subsystems. It supports applications that require long reach (up to 15 meters), error-free links, and high EMI immunity requirement.
PHY IP supports the SOURCE function of MIPI A-PHY Gear-2 stated in standard specification. It supports data rate up to 4Gbps with integrated mixed signal circuit, high performance TX driver, embedded TX clock generation, on chip optional termination resistor calibration. View see the entire get in contact with
Block Diagram of the Automotive MIPI A-PHY Source IP - 1-Lane
The MXL-DPHY-CSI2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification for
D-PHY v2.1, which is backward compatible with MIPI Specification for
D-PHY v1.2. The IP is configured as a MIPI master optimized for CSI-2SM
(Camera Serial Interface) applications.
The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for high-Speed data traffic while low power functions are mostly used for control. View see the entire get in contact with
Block Diagram of the MIPI D-PHY CSI-2 TX in GlobalFoundries 22FDX MIPI D-PHY IP
MIPI D-PHY 4 Lane CSI2-TX 1.2G in TowerJazz 110nm The MXL-DPHY-CSI2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The IP is configured as a MIPI master optimized for camera interface applications (CSI-2).
The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control. View see the entire get in contact with
Block Diagram of the MIPI D-PHY 4 Lane CSI2-TX 1.2G in TowerJazz 110nm
Video Demo of the MIPI D-PHY 4 Lane CSI2-TX 1.2G in TowerJazz 110nm