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MIPI D-PHY DSI RX (Receiver) in TSMC 65LP

The MIPI D-PHY Receiver is a high-frequency low-power, low-cost, sourcesynchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY. The IP is configured as a MIPI slave and consists of 5 lanes: 1 Clock lane and 4 data lanes, which make it suitable for display interface applications (DSI). ....

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MIPI D-PHY DSI RX (Receiver) in TSMC 40LP

The MXL-DPHY-DSI-RX is a high- frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The . ....

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MIPI D-PHY Universal in TSMC 40LP for Automotive

The MIPI D-PHY Transmitter is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY. ....

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MIPI D-PHY CSI-2 TX+ in TSMC 28HPC+

The MXL-DPHY-CSI-2-TX+ is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification for D-PHY v2.1, which . ....

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MIPI D-PHY Transmitter in TSMC 28nm LP

The MXL-PHY-MIPI-UNIVERSAL-T-028LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Standard . ....

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