The configurable and scalable DesignWare Controller IP for PCI Express (PCIe) 6.0 supports all required features of the PCI Express 6.0 specifications, .
Controller IP for PCIe 6.0, Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations with Native User Interface XpressRICH™ Controller IP for PCIe® 6.0 is a configurable and scalable PCIe controller Soft IP designed for ASIC implementation. The XpressRICH Controller IP for PCIe 6.0 supports the PCIe® 6.0 specification, including 64GT/s data rates, PAM4, FLIT mode, and L0p power state, as well as version 6.x of the PHY Interface for PCI Express (PIPE) specification. Backwards compatible to the PCIe 5.0, 4.0, and 3.1/3.0 specifications, XpressRICH for PCIe 6.0 exposes a highly efficient transmit (Tx) and receive (Rx) interface with configurable bus widths. Designed to satisfy a multitude of customer and industry use cases, the IP can be configured to support endpoint, root port, switch port, and dual-mode topologies, allowing for a variety of use models. The provided Graphical User Interface (GUI) Wizard allows designers to tailor the IP to their exact requirement