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The amazing development of transistor technology has been the main driving force behind modern electronics. Over time, this process has slowed down introducing performance bottlenecks in data-intensive applications. A main cause is the classical von Neumann architecture, which entails constant data exchanges between processing units and data memory, wasting time and power. As a possible alternative, the Beyond von Neumann approach is now rapidly spreading. Although architectures following this paradigm vary a lot in layout and functioning, they all share the same principle: bringing computing elements as near as possible to memory while inserting customized processing elements, able to elaborate more data. Thus, power and time are saved through parallel execution and usage of processing components with local memory elements, optimized for running data-intensive algorithms. Here, a new memory-mapped co-processor (MeMPA) is presented to boost systems performance. MeMPA relies on a progra

Neural networksNangate opencell libraryCentral processing unitNeumann computingIn memory computingMagnetic tunnel junctionsPhase change memoriesHybrid memory cubesThrough silicon viasSingle instruction multiple dataFull adderField programmable gate arraysCoarse grained reconfigurable architecturesConfigurable logic blocksLook up tablesReconfigurable cells