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MIPI® CSI-2 Receiver D-PHY IP IP Core

The MXL-DPHY-CSI2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY . ....

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HBM2/2E Memory PHY IP Core

Optimized for high bandwidth and low latency, the HBM2E PHY delivers maximum performance and flexibility in a compact form factor and power-efficient . ....

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MIPI D-PHY Receiver IP Core

The MXL-DPHY-CSI2-RX-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for . ....

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MIPI M-PHY - TSMC 40nm IP Core

MIPI M-PHY Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A M-PHY configuration . ....

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HBM3 PHY

The Rambus High-Bandwidth Memory generation 3 (HBM3) PHY is optimized for systems that require a high-bandwidth, low-latency memory solution. The memory . ....

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