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RISC-V Functional Safety Processor IP Core introduced by Fraunhofer IPMS and CAST The Fraunhofer Institute for Photonic Microsystems IPMS and semiconductor intellectual property provider CAST, Inc. announced the immediate availability of EMSA5-FS, a fault-tolerant embedded RISC-V processor IP core designed to meet the most stringent functional safety requirements of automotive, air-borne, and other safety-critical applications. Developed by Fraunhofer IPMS, the EMSA5-FS Embedded Functional Safety RISC-V Processor is a 32-bit, in-order, single-issue, five-stage pipeline processor supporting the open standard RISC-V instruction set architecture (ISA). Its fail-safe features include built-in triple or double modular redundancy (with lockstep), error correction code (ECC) pro-tection of buses, a configurable memory protection unit, privileged operation modes, and Reset and Safety Manager Modules. It is available for ASICs or FPGAs, and as ei-ther a stand-alone processor or pre-integrat

Marcus pietzschCast incFraunhofer institute for photonic microsystemsFraunhofer institutePhotonic microsystemsSafety managerAutomotive safety integrityFailure modesDiagnostic analysisSafety manualNikos zervasநடிகர்கள் இன்க்ப்ரௌுந்ொபேர் நிறுவனம் க்கு ஃபோட்டானிக் மைக்ரோசிஸ்டம்ஸ்ப்ரௌுந்ொபேர் நிறுவனம்ஃபோட்டானிக் மைக்ரோசிஸ்டம்ஸ்பாதுகாப்பு மேலாளர்