New Capabilities Address Verification Challenge by Kevin Morris
It’s the season of rebirth. The sun is out. Flowers are in bloom. Birds busily build nests while semiconductor verification teams emerge from their long winter hibernation, ready to tool up for the challenges of the next process generation. Billions of unverified gates give shelter to countless bugs awaiting anxious design teams as they prepare for summer’s tape-outs and struggle to bring new software up on wobbly legs.
Yep, the first emulators and prototyping platforms of spring have arrived, and – failing to be greeted with their own shadows – engineers are rejoicing at the prospect of more productive, efficient, and effective verification of their next crop of chip designs.
Siemens Next-Gen Veloce Verification Systems Boost Capacity
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Siemens delivers next-generation, comprehensive hardware-assisted verification system
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