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SATA 6G PHY in TSMC (40nm, 28nm, 16nm, 12nm, N7)

The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interface to mass storage. .

SATA 6G PHY in TSMC (40nm, 28nm, 16nm)

The DesignWare Mixed-Signal PHY IP for SATA and eSATA is designed for use in SoC solutions. The PHY integrates seamlessly with the DesignWare SATA AHCI .

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