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SiPearl and Open-Silicon Research collaborate to accelerate custom silicon for HPC applications – CIE

4 weeks ago 168 Views SiPearl, the company designing the high-performance, energy-efficient microprocessor for the European exascale supercomputer and Open-Silicon Research, the India based entity of OpenFive, a provider of custom silicon solutions with differentiated IP, announced a multi-year joint collaboration to enable expansive development of innovative High Performance Computing (HPC) applications. Specifically, SiPearl is relying on Open-Silicon Research’s expertise in deep-submicron physical design implementation, advanced 2.5D packaging and global supply chain management to develop the highly integrated, high-performance 6nm system-on-a-chip (SoC) named RHEA. SiPearl’s Rhea SoC is designed in a leading-edge 6nm process node and will be implemented by Open-Silicon Research and manufactured at Taiwan Semiconductor Manufacturing Company (TSMC). OpenFive is a long-standing partner of TSMC through its Value Chain Aggregator (VCA) program. Applications using artificial

Huzefa cutlerywalaInternational salesTaiwan semiconductor manufacturing companySilicon research high bandwidth memorySilicon researchOpen silicon researchHigh performance computingRhea socValue chain aggregatorHigh bandwidth memoryPhilippe nottonVice presidentManaging directorசர்வதேச விற்பனைடைவாந் குறைக்கடத்தி உற்பத்தி நிறுவனம்சிலிக்கான் ஆராய்ச்சி உயர் அலைவரிசை நினைவு

SiPearl teams for 64 core 6nm HPC chip with 30bn transistors

February 23, 2021 // By Nick Flaherty An ARM-based high performance computing (HPC) system-on-chip called Rhea being designed by SiPearl in France will be built in 6nm by TSMC French chip designer SiPearl has teamed with Open-Silicon Research (OSR) in India to develop a 6nm ARM chip for embedded high performance computing (HPC) in 2.5D packaging. The chip, called Rhea, will be based on 64 ARM cores with over 30bn transistors and will be built on TSMC’s 6nm process. This will use the Value Chain Aggregator (VCA) programme through OSR’s US parent company, OpenFive, which is the open IP subsidiary of RISC-V chip developer SiFive. SiPearl already has a license from ARM to use the Neoverse V1 core, codenamed Zeus, and will use this for Rhea.

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Europrocessor design to be implemented in Bangalore

Europrocessor design to be implemented in Bangalore
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SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for High Performance Computing (HPC) Applications

SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for High Performance Computing (HPC) Applications
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