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Power & area optimized: 2–3-stage, single-issue pipeline, as small as 13 5k gates
E2系列针对面积和功耗进行了高度优化,提供一流的性能。针对微控制器和嵌入式设备,E2内核可通过高效的2级流水线配置为小至13.5k gates,或通过3级流水线,硬件浮点,指令缓存等实现更高性能。借助SiFive Core Designer平台,E2系列处理器可以完全定制以满足您的特定要求。
Sifive core designer
Ower amp area optimized 2 3 stage
Ingle issue pipeline
S small as 13 5k gates
22 series
P core
Ilicon ip
Emiconductor ip
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