Creating a quality RISC-V processor requires a verification methodology that enforces the highest standards. In this article, Philippe Luc, Director of .
Philippe Luc, Director of Verification at Codasip, shares his view on what bugs verification engineers should pay attention to. Did you know that between .
Finding a hardware bug in silicon has consequences. The severity of these consequences for the end user can depend on the use case. For the product manufacturer, .
Oxford, United Kingdom & Munich, Germany – 22 November 2021 Imperas Software Ltd., the leader in verification solutions for RISC-V, and Codasip, the leader in customizable RISC-V processor IP, today announced that Codasip has adopted Imperas reference designs and the Imperas DV solution for Codasip IP. Codasip has invested heavily into processor verification to deliver the industry’s…