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AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features

The 4th generation of aiWare automotive NPU hardware IP delivers up to 64 TOPS per core, leveraging innovative wavefront-processing algorithms and upgraded memory architecture to deliver dramatically improved

Investegate |AImotive Announcements | AImotive: AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features

AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features The 4 th generation of aiWare™ automotive NPU hardware IP delivers up to 64 TOPS per core, leveraging innovative wavefront-processing algorithms and upgraded memory architecture to deliver dramatically improved PPA and improved built-in ISO26262 safety support BUDAPEST, Hungary, May 27, 2021 (GLOBE NEWSWIRE) AImotive, one of the world’s leading suppliers of scalable modular automated driving technologies, today announced the latest release of its award-winning aiWare NPU hardware IP. Featuring substantial upgrades to on-chip memory architecture, innovative new wavefront-processing algorithms and enhanced ISO26262-compliant safety features, aiWare4 delivers the ultimate scalable solution from the most challenging single-chip edge applications to the highest performance central processing platforms for automotive AI. With aiWare4 many key metrics have been further im

AImotive launches 4th generation aiWare

AImotive launches 4th generation aiWare AImotive, a leading supplier of scalable modular automated driving technologies, has announced the latest release of it aiWare NPU hardware IP. aiWare4 features substantial upgrades to on-chip memory architecture, innovative new wavefront-processing algorithms and enhanced ISO26262-compliant safety features. In addition, many key metrics have been improved, including TOPS/mm2, effective TOPS/W and the range of high-efficiency CNN topologies. Upgraded capabilities for aiWare4 include: · Scalability: up to 64 TOPs per core (up from 32 TOPS for aiWare3) and up to 256 TOPS per multi-core cluster, with greater configurability of on-chip memory, hardware safety mechanisms and external/shared memory support

Autonomous & Self-Driving Vehicle News: Chevy, Hyundai, Aurora, Uber, Velodyne, Synopsis & AImotive

Autonomous & Self-Driving Vehicle News: Chevy, Hyundai, Aurora, Uber, Velodyne, Synopsis & AImotive
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