The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used .
ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. .
ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A .
MIPI UFS v3.1 Host Controller IP, Compatible with M-PHY and Unipro Our Universal Flash Storage (UFS) Controller IP is compliant with the latest JEDEC UFS v3.1 specification. The UFS standard is a high performance, low power serial interface that efficiently moves data between a host processor and mass storage devices. When our UFS Controller IP is combined with in-house developed UniPro Controller IP and M-PHY IP, designers can easily integrate PHY and the controller with low risk and accelerate time-to market with our UFS IP solution.
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Block Diagram of the MIPI UFS v3.1 Host Controller IP, Compatible with M-PHY and Unipro