TSMC partners with Ansys, Synopsys, and Cadence to boost silicon photonics program datacenterdynamics.com - get the latest breaking news, showbiz & celebrity photos, sport news & rumours, viral videos and top stories from datacenterdynamics.com Daily Mail and Mail on Sunday newspapers.
TSMC goes optical with a 3D stacked silicon photonics interconnect called COUPE — Compact Universal Photonic Engine. It could deliver up to 12.8 Tbps of on-package connectivity for future chip designs.
Starting with the chip packaging tech, which TSMC has branded "CoWoS" (Chip-on-Wafer-on-Substrate), it's essentially an enhanced version of typical chiplet designs, where multiple smaller dies are integrated.
TSMC introduced its System-on-Wafer (TSMC-SoW™) technology, an innovative solution to bring revolutionary performance to the wafer level in addressing the