Samsung demonstrates 3nm MBCFET chip: using nanochip structure to make transistors
Samsung Electronics and TSMC are currently planning to develop 3nm process technology research and development. According to reports, at the IEEE International Solid-State Circuits Conference (ISSCC), Samsung engineers shared the manufacturing details of the upcoming 3nm GAE MBCFET chip.
GAAFET transistors (gate full ring field-effect transistors) come in two forms in terms of structure, and they are an upgraded version of the current FinFET. Samsung stated that the traditional GAAFET process uses three layers of nanowires to construct transistors, and the gate is relatively thin. In addition, the Samsung MBCFET chip process uses nanosheets to construct transistors. Presently, Samsung has already registered a trademark for MBCFET. Samsung said that both methods can achieve 3nm, but it depends on the specific design.