Product Life Cycle of an Interconnect Bus
The portable stimulus standard (PSS) is the latest industry standard created to allow the specification of test intent and behavior such that the test stimulus can be reused across various target platforms.
The introduction of PSS alters the traditional approach of verifying and validating a system on chip (SoC), offering many advantages and a few challenges. This paper explores these process changes with the life cycle of an interconnect bus fabric from SystemC-based performance analysis to verification and validation using a generic PSS-based traffic generator.
Introduction
Verification techniques and methodologies have continually evolved ever since the design requirements have started becoming complex. The portable stimulus standard (PSS) is the latest addition to this evolution process and it was created to address the challenge of test portability. The new PSS allows creation of the test intent such that it can be reused across different target platforms. Along with portability, the PSS-based verification techniques also offer value in terms of visual test representation, constraint setting, dataflow-based randomization, and higher test quality. There is a subsequent process change involved in the SoC verification and validation process with the adoption of PSS-based techniques and it is important to understand its impact. This paper tries to explore these process changes with a case study of an interconnect bus fabric starting from SystemC-based performance analysis to verification and validation.