Power-Up Phase Determinism Using Multichip Synchronization Features In Integrated Wideband DACs And ADCs
By Michael Jones, Michael Hennerich, and Peter Delos, Analog Devices
The integration of multiple digital signal processing (DSP) blocks, wideband digital-to-analog converters (DACs), and wideband analog-to-digital converters (ADCs) within a single monolithic chip is now enabling the offload of power hungry FPGA resources to allow for smaller footprint, lower power, increased channel count platforms that can sample at higher rates than previously achievable. Along with this new capability comes novel multichip synchronization (MCS) algorithms within these integrated circuits (ICs), which allows users to achieve a known (deterministic) phase for all channels when powering the system or otherwise making software modifications to the system.
Unique Gate Drive Applications Enable Rapidly Switching On/Off for Your High Power Amplifier
Question: Can you switch on or off your RF source within 200 ns?
Answer: In pulsed radar applications, rapid turn on/off of the high power amplifier (HPA) is required during the transition from transmit to receive operation. Typical transition time objectives can be less than 1 µs. Historically this has been implemented through drain control. Drain control necessitates switching large currents at voltages ranging from 28 V to 50 V. This is practical with known switching power techniques, but involves additional physical size and circuit complications. In modern phased array antenna developments, while demanding the lowest SWaP possible, it is desirable to eliminate the complications associated with drain switching on HPAs.