Synopsys Research Reveals Significant Security Concerns in Popular Mobile Apps Amid Pandemic prnewswire.com - get the latest breaking news, showbiz & celebrity photos, sport news & rumours, viral videos and top stories from prnewswire.com Daily Mail and Mail on Sunday newspapers.
Highlights:
(PRNewsfoto/Synopsys, Inc.)
DesignWare Controller, PHY and Verification IP supports the latest features in the PCI Express 6.0 specification, enabling early SoC development
Low-latency controller with new MultiStream architecture delivers up to 2X the throughput of a conventional PCI Express controller
High-performance PHY in 5-nm process with unique analog and DSP techniques provides 20 percent less power across chip-to-chip, riser card and backplane interfaces
Comprehensive set of protocol, methodology and productivity features enable rapid verification of PCI Express 6.0 designs
Synopsys, Inc. (Nasdaq: SNPS) today announced the industry s first complete IP solution for the PCI Express
® (PCIe
®) 6.0 technology that includes controller, PHY and verification IP, enabling early development of PCIe 6.0 system-on-chip (SoC) designs. Built on Synopsys widely deployed and silicon-proven DesignWare
Rockley Selects Synopsys for Silicon Photonics Design Solutions
Synopsys Provides Complete Front-to-Back Photonic IC Design Solutions, Supported by Photonics Experts
News provided by
Share this article
Share this article
MOUNTAIN VIEW, Calif., March 15, 2021 /PRNewswire/ Synopsys, Inc. (Nasdaq: SNPS) today announced that Rockley Photonics, a leading global supplier of integrated optical chips and modules, has adopted Synopsys solutions to accelerate the design and verification of silicon photonics for sensing and datacom applications. Rockley is using tools from Synopsys Photonic Solutions platform, including OptoCompiler
™, OptoDesigner, OptSim
™ Circuit, RSoft
™ Photonic Device Tools and IC Validator. Rockley plans to use Synopsys solutions to design and optimize photonic devices, create process design kits (PDKs) and tape out photonic ICs.
® EV Development Toolkit. By using Synopsys programmable ARC EV Processor, Kyocera successfully integrated high-performance artificial intelligence (AI) processing capabilities such as super resolution, with the flexibility to support future AI models. In addition, Kyocera deployed Synopsys HAPS
® FPGA-based prototyping system to accelerate ARC EV software development, SoC integration, and system validation. Implementing advanced AI functionality into our MFP SoC required high-performance, low-power processor IP with a high-quality tool chain, allowing us to find and test AI algorithms while developing the SoC in parallel, said Michihiro Okada, general manager, software development division at Kyocera Document Solutions Inc. Only Synopsys DesignWare ARC EV Processor IP and mature MetaWare EV Toolkit met our extensibility, performance, and area requirements.
Synopsys Announces Euclide to Accelerate Design and Verification Productivity
Finds Bugs Early and Optimizes Code for Design Compiler, VCS and ZeBu
News provided by
Share this article
Highlights:
Correct-by-construction coding ensures RTL compatibility for Design Compiler and ZeBu
Real-time checks help to avoid costly testbench errors and increase VCS performance
Integration with Verdi for seamless debug and code development
Built-in SystemVerilog/UVM compliance assures best coding practices across verification teams
Synopsys, Inc. (Nasdaq: SNPS) today introduced Synopsys Euclide, the industry s next-generation hardware description language (HDL)-aware integrated development environment (IDE). Synopsys Euclide enables engineers to find bugs earlier and optimize code for design and verification flows by identifying complex design and testbench compliance checks during SystemVerilog and Universal Verification Methodology (UVM) development.