Synopsys Selected for Rapid Assured Microelectronics Prototypes Program
Collaboration with Microsoft To Create a Secure Design Environment while Enabling Assurance throughout the Silicon Lifecycle
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MOUNTAIN VIEW, Calif., Feb. 4, 2021 /PRNewswire/
Synopsys, Inc. (Nasdaq: SNPS) today announced that it is collaborating with Microsoft in the Rapid Assured Microelectronics Prototypes (RAMP) program to support the development of integrated circuit hardware and workflow prototypes that incorporate Synopsys assured design and manufacturing flows into Microsoft Azure. Rapid, secure and assured prototypes are a critical need for modern systems, said Deirdre Hanford, chief security officer at Synopsys. Synopsys is committed to delivering design and manufacturing solutions that enable development of systems created with security in mind which are needed for the next generation of critical infrastructure, including autonomous vehicles,
Synopsys : Selected for Rapid Assured Microelectronics Prototypes Program
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Highlights
® 5.0 or CXL™ 2.0 architectures
Pre-verified with DesignWare Controller IP for PCI Express technology and CXL enables fast integration and lowers risk
Efficient encryption/decryption and authentication with AES-GCM helps ensure data confidentiality and integrity for high-performance systems
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the DesignWare
® Integrity and Data Encryption (IDE) Security Modules to help designers protect against data tampering and physical attacks in high-performance computing (HPC) SoCs using the PCI Express
® (PCIe
™ (CXL
™) 2.0 interface. The DesignWare IDE Security Modules protect sensitive data with efficient encryption, decryption, and authentication based on AES-GCM algorithms while meeting PCIe 5.0 specification and CXL 2.0 IP performance and latency requirements. The DesignWare IDE Security Modules are designed to the latest PCIe 5.0 specification and CXL 2.0 interface standards and are designed an
Synopsys Announces Industry s First CXL 2.0 VIP Solution for Breakthrough SoC Performance
Native System Verilog VIP Features Built-in Coverage, Verification Planning, and Memory-Aware Debug and Performance Analysis
MOUNTAIN VIEW, Calif., Nov. 10, 2020 /PRNewswire/
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry s first Verification IP (VIP) for Compute Express Link
™ (CXL
™) 2.0 designed for breakthrough performance in data-intensive system-on-chips (SoCs). CXL is the next-generation open standard interconnect that enables an ecosystem for high-speed communication between the CPU and workload accelerators, such as GPUs, FPGAs and other purpose-built accelerator solutions, as well as memory expansion devices. The technology is built upon the well-established PCI Express
Sondrel Selects Synopsys Fusion Design and Verification Platforms to Displace Legacy Design Tools
Sondrel Accelerates SoC Design and Packaging with Synopsys Solutions
MOUNTAIN VIEW, Calif., Jan. 19, 2021 /PRNewswire/ Synopsys, Inc. (Nasdaq: SNPS) today announced Sondrel has adopted the Synopsys Fusion Design and Verification Continuum platforms to accelerate the design and verification of large, complex system-on-chip (SoC) designs for automotive, AI, machine learning, IoT, consumer AR/VR gaming, and security applications. Sondrel plans to use solutions from Synopsys design and verification platforms to create power-efficient designs for their customers.
As Sondrel expands its capabilities to transform designs into tested, volume-packaged silicon, Synopsys was chosen based on several critical benchmarks to replace its legacy design systems. Synopsys track-record of power-efficient designs and power, performance and area metrics drove Sondrel s decision to adopt the industr
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