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Cadence accelerates on-device and Edge AI performance and efficiency with new Neo NPU IP and NeuroWeave SDK for silicon design – CIE

Cadence accelerates on-device and Edge AI performance and efficiency with new Neo NPU IP and NeuroWeave SDK for silicon design – CIE
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Tensilica dspsNeo npusBob odonnellCadence design systemsAndroid neural network compilerTechnalysis researchSoftware development kitDesign systemsNeural processing unitsBobo donnellTensorflow liteTensorflow lite microIntelligent system

Accelerating on-device and edge AI performance and efficiency

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Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design

Neo NPUs efficiently offload from any host processor and scale from 8 GOPS to 80 TOPS in a single core, extending to hundreds of TOPS for multicore AI IP delivers industry-leading AI performance and energy efficiency for optimal PPA and cost points Targets a broad range of on-device and edge applications, including intelligent sensors, IoT, audio/vision, hearables/wearables, mobile vision/voice AI,…

Yassir rizwanNeo npusBob odonnellTensilica dspsDavid glascoCadence design systems incTechnalysis researchSoftware development kitAndroid neural network compilerLabforge incCadence design systemsNeural processing unitsBobo donnellLite delegatesTensorflow lite microCadence tensilica

Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design

Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design
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Tensilica dspsNeo npusBob odonnellDavid glascoYassir rizwanAndroid neural network compilerCadence design systems incCompanies to workTechnalysis researchSoftware development kitLabforge incCadence design systemsNeural processing unitsBobo donnellTensorflow liteTensorflow lite micro

Cadence Accelerates On-Device and Edge AI Performance, Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design

Cadence Accelerates On-Device and Edge AI Performance, Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design
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Yassir rizwanTensilica dspsDavid glascoBob odonnellNeo npusCadence design systems incSoftware development kitAndroid neural network compilerTechnalysis researchLabforge incDesign systemsCadence neo neural processing unitsNeural processing unitsBusiness wireBobo donnellTensorflow lite